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Internal/Contributor docs for the Qt SDK. <b>Note:</b> These are NOT official API docs; those are found <a href='https://doc.qt.io/'>here</a>.
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qsimd_x86.cpp File Reference

(f89c4c4f8fd5afbb6a5480fe2fc13bb6dcaace47)

#include "qsimd_x86_p.h"
+ Include dependency graph for qsimd_x86.cpp:

Go to the source code of this file.

Classes

struct  X86Architecture
 
struct  XSaveRequirementMapping
 

Enumerations

enum  X86CpuidLeaves {
  Leaf01EDX , Leaf01ECX , Leaf07_00EBX , Leaf07_00ECX ,
  Leaf07_00EDX , Leaf07_01EAX , Leaf07_01EDX , Leaf13_01EAX ,
  Leaf80000001hECX , Leaf80000008hEBX , X86CpuidMaxLeaf
}
 
enum  XSaveBits {
  XSave_X87 = 0x0001 , XSave_SseState = 0x0002 , XSave_Ymm_Hi128 = 0x0004 , XSave_Bndregs = 0x0008 ,
  XSave_Bndcsr = 0x0010 , XSave_OpMask = 0x0020 , XSave_Zmm_Hi256 = 0x0040 , XSave_Hi16_Zmm = 0x0080 ,
  XSave_PTState = 0x0100 , XSave_PKRUState = 0x0200 , XSave_CetUState = 0x0800 , XSave_CetSState = 0x1000 ,
  XSave_HdcState = 0x2000 , XSave_UintrState = 0x4000 , XSave_HwpState = 0x10000 , XSave_Xtilecfg = 0x20000 ,
  XSave_Xtiledata = 0x40000 , XSave_AvxState = XSave_SseState | XSave_Ymm_Hi128 , XSave_MPXState = XSave_Bndregs | XSave_Bndcsr , XSave_Avx512State = XSave_AvxState | XSave_OpMask | XSave_Zmm_Hi256 | XSave_Hi16_Zmm ,
  XSave_CetState = XSave_CetUState | XSave_CetSState , XSave_AmxState = XSave_Xtilecfg | XSave_Xtiledata
}
 

Variables

static const char features_string []
 
static const uint16_t features_indices []
 
static const uint16_t x86_locators []
 
static const struct X86Architecture x86_architectures []
 
static const uint64_t XSaveReq_AvxState
 
static const uint64_t XSaveReq_Avx512State
 
static const uint64_t XSaveReq_CetState
 
static const struct XSaveRequirementMapping xsave_requirements []
 

Enumeration Type Documentation

◆ X86CpuidLeaves

Enumerator
Leaf01EDX 
Leaf01ECX 
Leaf07_00EBX 
Leaf07_00ECX 
Leaf07_00EDX 
Leaf07_01EAX 
Leaf07_01EDX 
Leaf13_01EAX 
Leaf80000001hECX 
Leaf80000008hEBX 
X86CpuidMaxLeaf 

Definition at line 57 of file qsimd_x86.cpp.

◆ XSaveBits

enum XSaveBits
Enumerator
XSave_X87 
XSave_SseState 
XSave_Ymm_Hi128 
XSave_Bndregs 
XSave_Bndcsr 
XSave_OpMask 
XSave_Zmm_Hi256 
XSave_Hi16_Zmm 
XSave_PTState 
XSave_PKRUState 
XSave_CetUState 
XSave_CetSState 
XSave_HdcState 
XSave_UintrState 
XSave_HwpState 
XSave_Xtilecfg 
XSave_Xtiledata 
XSave_AvxState 
XSave_MPXState 
XSave_Avx512State 
XSave_CetState 
XSave_AmxState 

Definition at line 146 of file qsimd_x86.cpp.

Variable Documentation

◆ features_indices

const uint16_t features_indices[]
static
Initial value:
= {
0, 6, 12, 19, 24, 32, 40, 47,
55, 60, 65, 71, 78, 83, 89, 95,
104, 114, 122, 134, 144, 149, 159, 169,
181, 190, 203, 210, 216, 222, 236, 253,
261, 266, 278, 286, 297, 306,
}

Definition at line 49 of file qsimd_x86.cpp.

◆ features_string

const char features_string[]
static

Definition at line 8 of file qsimd_x86.cpp.

◆ x86_architectures

const struct X86Architecture x86_architectures[]
static
Initial value:
= {
{ cpu_core2, "Core2" },
{ cpu_westmere, "Westmere" },
{ cpu_sandybridge, "Sandy Bridge" },
{ cpu_silvermont, "Silvermont" },
{ cpu_ivybridge, "Ivy Bridge" },
{ cpu_goldmont, "Goldmont" },
{ cpu_haswell, "Haswell" },
{ cpu_broadwell, "Broadwell" },
{ cpu_tremont, "Tremont" },
{ cpu_skylake, "Skylake" },
{ cpu_skylake_avx512, "Skylake (Avx512)" },
{ cpu_cascadelake, "Cascade Lake" },
{ cpu_cooperlake, "Cooper Lake" },
{ cpu_cannonlake, "Cannon Lake" },
{ cpu_gracemont, "Gracemont" },
{ cpu_icelake_client, "Ice Lake (Client)" },
{ cpu_icelake_server, "Ice Lake (Server)" },
{ cpu_crestmont, "Crestmont" },
{ cpu_tigerlake, "Tiger Lake" },
{ cpu_clearwaterforest, "Clearwater Forest" },
{ cpu_grandridge, "Grand Ridge" },
{ cpu_raptorcove, "Raptor Cove" },
{ cpu_redwoodcove, "Redwood Cove" },
{ cpu_emeraldrapids, "Emerald Rapids" },
{ cpu_graniterapids, "Granite Rapids" },
}
#define cpu_haswell
#define cpu_westmere
#define cpu_redwoodcove
#define cpu_skylake
#define cpu_icelake_server
#define cpu_gracemont
#define cpu_graniterapids
#define cpu_clearwaterforest
#define cpu_icelake_client
#define cpu_cannonlake
#define cpu_core2
Definition qsimd_x86_p.h:77
#define cpu_cooperlake
#define cpu_ivybridge
#define cpu_grandridge
#define cpu_emeraldrapids
#define cpu_tigerlake
#define cpu_cascadelake
#define cpu_tremont
#define cpu_skylake_avx512
#define cpu_sandybridge
#define cpu_crestmont
#define cpu_goldmont
#define cpu_silvermont
#define cpu_broadwell
#define cpu_raptorcove

Definition at line 118 of file qsimd_x86.cpp.

◆ x86_locators

const uint16_t x86_locators[]
static

Definition at line 71 of file qsimd_x86.cpp.

◆ xsave_requirements

const struct XSaveRequirementMapping xsave_requirements[]
static
Initial value:
= {
}
@ XSave_AvxState
@ XSave_Avx512State
@ XSave_CetState
static const uint64_t XSaveReq_AvxState
static const uint64_t XSaveReq_Avx512State
static const uint64_t XSaveReq_CetState

Definition at line 215 of file qsimd_x86.cpp.

◆ XSaveReq_Avx512State

const uint64_t XSaveReq_Avx512State
static
Initial value:
= 0
#define cpu_feature_avx512ifma
Definition qsimd_x86_p.h:47
#define cpu_feature_avx512vpopcntdq
Definition qsimd_x86_p.h:61
#define cpu_feature_avx512f
Definition qsimd_x86_p.h:44
#define cpu_feature_avx512vl
Definition qsimd_x86_p.h:51
#define cpu_feature_avx512bitalg
Definition qsimd_x86_p.h:60
#define cpu_feature_avx512dq
Definition qsimd_x86_p.h:45
#define cpu_feature_avx512vbmi2
Definition qsimd_x86_p.h:56
#define cpu_feature_avx512fp16
Definition qsimd_x86_p.h:66
#define cpu_feature_avx512bw
Definition qsimd_x86_p.h:50
#define cpu_feature_avx512vbmi
Definition qsimd_x86_p.h:54
#define cpu_feature_avx512cd
Definition qsimd_x86_p.h:48

Definition at line 192 of file qsimd_x86.cpp.

◆ XSaveReq_AvxState

◆ XSaveReq_CetState

const uint64_t XSaveReq_CetState
static
Initial value:
= 0
#define cpu_feature_shstk
Definition qsimd_x86_p.h:57

Definition at line 206 of file qsimd_x86.cpp.