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qsimd.h
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// Copyright (C) 2020 The Qt Company Ltd.
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// Copyright (C) 2022 Intel Corporation.
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// SPDX-License-Identifier: LicenseRef-Qt-Commercial OR LGPL-3.0-only OR GPL-2.0-only OR GPL-3.0-only
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#ifndef QSIMD_H
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#define QSIMD_H
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#include <QtCore/qglobal.h>
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/*
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* qconfig.h defines the QT_COMPILER_SUPPORTS_XXX macros.
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* They mean the compiler supports the necessary flags and the headers
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* for the x86 and ARM intrinsics.
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*
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* Supported instruction set extensions are:
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* Flag | Arch
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* neon | ARM
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* mips_dsp | mips
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* mips_dspr2 | mips
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* sse2 | x86
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* sse4_1 | x86
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* sse4_2 | x86
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* avx | x86
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*
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* Code can use the following constructs to determine compiler support & status:
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* - #if QT_COMPILER_USES(XXX) (e.g: #if QT_COMPILER_USES(neon) or QT_COMPILER_USES(sse4_1)
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* If this test passes, then the compiler is already generating code using the
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* given instruction set. The intrinsics for those instructions are
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* #included and can be used without restriction or runtime check.
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*
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* Code that requires runtime detection and different code paths at runtime is
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* currently not supported here, have a look at qsimd_p.h for support.
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*/
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#define QT_COMPILER_USES(feature) (1/QT_COMPILER_USES_##feature == 1)
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#if defined(Q_PROCESSOR_ARM) && defined(__ARM_NEON) || defined(__ARM_NEON__)
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# include <arm_neon.h>
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# define QT_COMPILER_USES_neon 1
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#else
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# define QT_COMPILER_USES_neon -1
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#endif
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#if defined(Q_PROCESSOR_MIPS) && (defined(__MIPS_DSP__) || (defined(__mips_dsp) && defined(Q_PROCESSOR_MIPS_32)))
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# define QT_COMPILER_USES_mips_dsp 1
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#else
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# define QT_COMPILER_USES_mips_dsp -1
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#endif
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#if defined(Q_PROCESSOR_MIPS) && (defined(__MIPS_DSPR2__) || (defined(__mips_dspr2) && defined(Q_PROCESSOR_MIPS_32)))
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# define QT_COMPILER_USES_mips_dspr2 1
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#else
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# define QT_COMPILER_USES_mips_dspr2 -1
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(Q_CC_MSVC)
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// MSVC doesn't define __SSE2__, so do it ourselves
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# if (defined(_M_X64) || _M_IX86_FP >= 2) && defined(QT_COMPILER_SUPPORTS_SSE2)
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# define __SSE__ 1
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# define __SSE2__ 1
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# endif
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# if (defined(_M_AVX) || defined(__AVX__))
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// Visual Studio defines __AVX__ when /arch:AVX is passed, but not the earlier macros
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// See: https://msdn.microsoft.com/en-us/library/b0084kay.aspx
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# define __SSE3__ 1
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# define __SSSE3__ 1
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# define __SSE4_1__ 1
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# define __SSE4_2__ 1
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# define __POPCNT__ 1
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# ifndef __AVX__
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# define __AVX__ 1
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# endif
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# endif
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# ifdef __SSE2__
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# define QT_VECTORCALL __vectorcall
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# endif
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# ifdef __AVX2__
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// MSVC defines __AVX2__ with /arch:AVX2
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# define __F16C__ 1
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# define __RDRND__ 1
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# define __FMA__ 1
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# define __BMI__ 1
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# define __BMI2__ 1
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# define __MOVBE__ 1
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# define __LZCNT__ 1
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# endif
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// Starting with /arch:AVX512, MSVC defines all the macros
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(__SSE2__)
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# include <immintrin.h>
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# define QT_COMPILER_USES_sse2 1
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#else
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# define QT_COMPILER_USES_sse2 -1
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(__SSE3__)
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# define QT_COMPILER_USES_sse3 1
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#else
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# define QT_COMPILER_USES_sse3 -1
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(__SSSE3__)
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# define QT_COMPILER_USES_ssse3 1
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#else
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# define QT_COMPILER_USES_ssse3 -1
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(__SSE4_1__)
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# define QT_COMPILER_USES_sse4_1 1
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#else
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# define QT_COMPILER_USES_sse4_1 -1
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(__SSE4_2__)
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# define QT_COMPILER_USES_sse4_2 1
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#else
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# define QT_COMPILER_USES_sse4_2 -1
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#endif
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#if defined(Q_PROCESSOR_X86) && defined(__AVX__)
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# define QT_COMPILER_USES_avx 1
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#else
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# define QT_COMPILER_USES_avx -1
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#endif
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#ifndef QT_VECTORCALL
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#define QT_VECTORCALL
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#endif
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QT_BEGIN_NAMESPACE
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QT_END_NAMESPACE
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#endif
// QSIMD_H
QT_BEGIN_NAMESPACE
Combined button and popup list for selecting options.
Definition
qstandardpaths_haiku.cpp:21
QT_END_NAMESPACE
Definition
qsharedpointer.cpp:1590
qtbase
src
corelib
global
qsimd.h
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